A 1.3V 12-bit 100-MHz Current-Steering DAC in 55nm Technology
نویسندگان
چکیده
Abstract In this paper, a 12-bit 100MS/s digital-to-analog converter (DAC) is presented, where segmented current steering technique employed. A “4+8” architecture used compromising the advantages and disadvantages of binary-weighted thermometer-coded DACs. Cascode source cascode switch to achieve high input impedance minimize output glitches for good linearity dynamic performance. The simulation results show that SFDR over 77 dB, ENOB 11.6 bit at least. DAC consumes 2.27 mW from 1.3-V supply.
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ژورنال
عنوان ژورنال: Journal of physics
سال: 2023
ISSN: ['0022-3700', '1747-3721', '0368-3508', '1747-3713']
DOI: https://doi.org/10.1088/1742-6596/2585/1/012005